The invention relates to semiconductor devices, and, more particularly, to integrated circuit insulation and methods of fabrication.
Integrated circuits typically include field effect transistors with source/drains formed in a silicon substrate and insulated gates on the substrate together with multiple overlying metal (or polysilicon) interconnections formed in levels. An insulating layer lies between the gates/sources/drains and the interconnections formed from the first metal level (premetal dielectric) and also between successive metal levels (intermetal-level dielectric). Vertical vias in the insulating layers filled with metal (or polysilicon) provide connections between interconnections formed in adjacent metal levels and also between the gate/source/drain and the first metal level interconnections. Each insulating layer must cover the relatively bumpy topography of the interconnections of a metal level or the gates, and this includes crevices between closely spaced interconnects in the same metal level. Also, the dielectric constant of the insulating layer should be as low as practical to limit capacitive coupling between closely spaced interconnects in the same metal level and in adjacent overlying and underlying metal levels.
Various approaches to forming insulating layers over bumpy topography have been developed which all form a silicon dioxide (oxide) type insulator: reflowing deposited borophosphosilicate glass (BPSG), using spin-on glass (SOG) which typically are siloxanes, sputtering while depositing in plasma enhanced chemical vapor deposition (PECVD) with tetraethoxysilane (TEOS), etching back a stack of deposited glass plus spun-on planarizing photoresist, and chemical-mechanical polishing (CMP).
All these approaches have problems including the relatively high dielectric constant of silicon dioxide: roughly 3.9. This limits how closely the interconnections can be packed and still maintain a low capacitive coupling.
Laxman, Low .epsilon. Dielectrics: CVD Fluorinated Silicon Dioxides, 18 Semiconductor International 71 (May 1995), summarizes reports of fluorinated silicon dioxide for use as an intermetal level dielectric which has a dielectric constant lower than that of silicon dioxide. In particular, PECVD using silicon tetrafluoride (SiF.sub.4), silane (SiH.sub.4), and oxygen (O.sub.2) source gasses can deposit SiO.sub.X F.sub.Y, with up to 10% fluorine and a dielectric constant in the range 3.0 to 3.7. But this dielectric constant still limits the packing density of interconnections.
Organic polymer insulators provide another approach to low dielectric constant insulators. Formation by chemical vapor deposition (CVD) ensures filling of crevices between closely spaced interconnections. Some integrated circuit fabrication methods already include polyimide as a protective overcoat. However, polyimide has problems including a dielectric constant of only about 3.2-3.4 and an affinity to absorb water which disrupts later processing when used as an intermetal level dielectric. On the positive side, it does have a temperature tolerance up to about 500.degree. C.
Parylene is a generic term for a class of poly-para-xylylenes with structures such as the following: ##STR1## These polymers are members of a family of thermoplastic polymers that have low dielectric constants (e.g., 2.35 to 3.15), low water affinity, and may be conformally deposited from a vapor without solvents and high temperature cures. Parylene with hydrogen on the aliphatic carbons may be used at temperatures up to about 400.degree. C. under an N.sub.2 atmosphere, whereas aliphatic perfluorination increases the useful temperature to about 530.degree. C.
You et al., Vapor Deposition of Parylene Films from Precursors, in Chemical Perspectives of Microelectronic Materials III, Materials Research Society Symposium Proceedings Nov. 30, 1992, discloses a method for fabrication of fluorinated parylene by starting with a liquid dibromotetra-fluoro-p-xylene precursor and then converting the precursor at 350.degree. C. to active monomers which adsorb and polymerize at -15.degree. C. on a substrate. The reaction looks like: ##STR2##
You et al. synthesize the precursor from the dialdehyde (terephthalaldehyde): ##STR3## The benzene ring could also be (partially) fluorinated with standard halogenation methods. Such fluorination would lower the dielectric constant and increase the useful temperature.
The parylene films may also be deposited with the use of dimers of the active monomers as an intermediate product. See, You et al. and Dolbier et al., U.S. Pat. No. 5,210,341, as in the reaction: ##STR4##
However, these organic polymers often have problems including poor adhesion to silicon oxides and metal, and insufficient thermal stability for the subsequent processing typically found in integrated circuit fabrication, such as an aluminum sinter at 450.degree. C.